1. Field of the Invention
The field of art to which this invention relates is semiconductor manufacturing techniques. Specifically, this invention relates to apparatus and methods for planarizing semiconductor wafers.
2. Description of the Related Art
The manufacture of an integrated circuit device requires the formation of various layers (both conductive and non-conductive) above the base substrate to form the necessary components and interconnects. During the manufacturing process, removal of a certain layer or portions of a layer must be achieved in order to pattern and form the various components and interconnects. Generally this removal process is termed "etching" or "polishing."
One of the techniques available for etching is the chemical-mechanical polishing (hereinafter "CMP") process in which a chemical slurry is used along with a polishing pad. The mechanical movement of the pad relative to the wafer provides the abrasive force for removing the exposed surface of the wafer. Because of the broad surface area covered by the pad in most instances, CMP is utilized to plarize a given layer. Planarization is a method of treating a surface to remove discontinuities, such as by polishing (or etching), thereby "planarizing" the surface.
Various methods and apparatus have been developed in the art for polishing semiconductor wafers. However, it has been found that during polishing, the load imposed on the wafer leads to a higher concentration of slurry contacting the wafer edges, than its center. As a result, there is greater polishing action at the edges, thus causing center-to-edge non-uniformity in thickness and poor flatness of the wafer.
FIG. 1 shows a typical apparatus for polishing a semiconductor wafer 1. The apparatus includes a wafer carrier 2 which is coupled to a spindle 3, which in turn is coupled to any suitable motor or driving means (not shown) for moving the carrier 2 in the directions indicated by arrows 4a, 4b, and 4c (rotation). The spindle 3 supports a load 5, which is exerted against the carrier 2 and thus against the wafer 2 during polishing. The carrier 2 also includes a wafer retaining ring 6, which prevents the wafer 1 from sliding out from under the carrier 2 as the carrier 2 moves. The semiconductor wafer 1, which is to be polished, is mounted to the carrier 2, positioned between the carrier 2 and the rotatable turntable assembly 7 located below the carrier 2. The turntable assembly 7 includes a polishing table 8, on which a polishing pad 9 is positioned, and the polishing table 8 is rotated around the shaft 10 in the direction indicated by arrow 11 by any suitable motor or driving means (not shown).
During polishing, a slurry (not shown) is introduced to the polishing pad 9 which works its way between the wafer carrier 2 and the pad 9. Due to the load 5 which is imposed on the wafer carrier 2, a higher concentration of slurry generally contacts the wafer edges, as previously noted, resulting in a greater polishing action at the edges.
Efforts have been made in the art to obtain a more uniform polishing action across the wafer surface. The prior art teaches the various mechanisms employed to maintain the process uniformity and regional rates of removal during the CMP process. One of these is the application of backside air pressure. This is done via conduits through the carrier and holes pre-punched in an elastomer backing film, against which the wafer is retained. An air pressure is supplied to the back of the wafer during the polish process causing the wafer to bow, or at the very least, increasing the force applied regionally across the wafer. This additional force at the wafer center reduces the polish rate at the wafer perimeter, thereby improving the overall polish uniformity because the removal rate is greater at the perimeter of the wafer than at the center of the wafer.
While this process has its advantages, it also has drawbacks. Firstly, given the structure of the prior art carriers, a wafer cannot be processed with both backside air and vacuum (the vacuum being supplied for wafer pick-up and transport thru the same conduits mentioned previously). Secondly, the pressure applied for backside air cannot exceed the downforce applied by the carrier arm. Therefore, there is an operational threshold associated with this prior art process. This threshold limits the effective range and capability of backside air as a singular means to control process uniformity. Thirdly, the application of air pressure to the open cavity between the carrier backing film and the wafer allows a large portion of the applied force to escape and therefore, also limits the capability of the technique. Finally, it is well known that the various elements of the polish process degrade (i.e., wear and/or compress), such as the pad and the backing film, which means that a greater amount of backside air is necessary to maintain the process result.
Because of these drawbacks, another technique has been developed in the art in which the carrier face is fabricated to provide a curvature to the carrier where the wafer is seated. This, in effect, preloads a fixed applied force to the center of the wafer. While this process also has its advantages, it too suffers from some drawbacks. It remains necessary to apply an ever increasing amount of backside air over time. It should also be readily apparent that varying the depth of the milling (i.e., the degree of curvature) will vary the amount of preload. This of course requires many carriers of differing milled specifications having differing degrees of curvature. It should also be apparent that a carrier having a certain curvature may work well with one level or product type, yet may not work as well with another level or product type. Thus, without dedicating polishers, this technique would require many carrier changes during the course of processing.